Optimize the Output Path for Low Loss and Compact Design
Competition in 65W fast-charger design now extends to every section of the power path. Conversion efficiency must improve while the space around the output interface becomes increasingly constrained. Between the internal DC output and the USB-C connector, the MOSFET that controls output switching also affects loss allocation, localized heating, and gate-drive requirements. Selecting this device means matching voltage rating, on-resistance, drive conditions, and package size to the application.
The SHIKUES SK45N03BD is an N-channel enhancement-mode power MOSFET manufactured using an LVMOS process. It combines a 30V drain-source voltage rating, milliohm-level on-resistance, and a PDFN3.3×3.3 package. In the SHIKUES 65W PD Fast-Charger Schematic, SK45N03BD is designated Q2. Positioned between internal VOUT and external VBUS, with its gate connected to the SC3107C controller's NDRV pin, it serves as the controlled power switch in the USB-C output path.
This application gives the device's features a clear purpose: conduction loss matters during sustained power delivery, gate-drive matching matters during output switching, and package size and thermal paths matter in compact layouts. The following five design challenges show how these requirements guide device selection.
Inside the Solution: How Q2 Links Control to Power Delivery
Q2's drain connects to the internal output node, the controller's VOUT pin, and the positive terminal of output capacitor EC6. Its source connects to the VBUS and USB-C output path, while its gate connects to NDRV. The controller's VBUS pin connects to the output side through R13, providing the output-voltage sensing connection.
The controller and power device perform complementary roles: the controller provides gate drive and timing, while SK45N03BD switches the power path. Q2 has a different role from synchronous-rectification device Q1. Its optimization priorities are output-switch voltage drop, conduction loss, and controlled switching behavior. Understanding this circuit position makes each device parameter relevant to the design.
Challenge 1: Output-Path Loss Deserves a Place in the Thermal Budget
Pain point: Continuous current flows through the output switch, so even milliohm-level resistance differences contribute to heating.
During normal power delivery, the output switch continuously carries the load current. Its channel conduction loss can be estimated as Pcond ≈ I² × RDS(on). As current increases, on-resistance has a greater influence on dissipation. In a space-constrained charger, reducing this loss helps ease the localized thermal load on the output switch and supports the thermal design of the connector and nearby components.
Solution: Optimize the output path with low on-resistance.
At TJ = 25°C, VGS = 10V, and ID = 15A, SK45N03BD specifies a typical RDS(on) of 8.5mΩ and a maximum of 10mΩ. Using a 20V, 3.25A operating point as a 65W calculation example, 10mΩ gives an estimated channel voltage drop of 32.5mV and conduction loss of approximately 0.106W for Q2.
These parameters provide a defined starting point for the output-switch loss budget. Including actual junction temperature, gate-drive voltage, PCB trace resistance, and connector resistance then extends the device-level estimate into an assessment of the complete output path.
Challenge 2: Can the Actual Gate Drive Deliver the Expected Low Resistance?
Pain point: A single resistance value can obscure the gate-drive conditions under which it applies.
For a high-side output switch, adequate enhancement depends on VGS: the voltage difference between gate and source. As the output potential changes, gate-to-ground voltage alone does not establish the MOSFET's conduction state. Gate-threshold voltage also does not define the drive voltage required for low-resistance conduction.
Solution: Use on-resistance specifications at two gate-drive voltages for a closer application match.
Alongside its 10V gate-drive rating, SK45N03BD specifies RDS(on) at VGS = 4.5V, ID = 15A, and TJ = 25°C: 12mΩ typical and 15mΩ maximum. Engineers can use the resistance associated with the actual gate-source drive conditions, rather than applying one value to every operating state.
At the same 3.25A current, 15mΩ gives an estimated channel conduction loss of approximately 0.158W. The difference between the two drive conditions illustrates how gate-drive voltage affects the loss budget. Clearly defined drive conditions and resistance values make selection and debugging more focused.
Challenge 3: Smaller Enclosures Leave Less Output-Side PCB Space
Pain point: Power devices, the connector, sensing circuits, and thermal copper must share a limited area.
The output side of a compact charger must accommodate more than a MOSFET. The USB-C connector, voltage-sensing network, and current-sensing circuitry also compete for space. Package dimensions influence component placement and routing choices. Simply reducing the gaps between components can introduce new constraints for heat flow and assembly.
Solution: Support compact layouts with a PDFN3.3×3.3 package.
SK45N03BD uses a PDFN3.3×3.3 package, with nominal planar dimensions corresponding to a body outline area of approximately 10.9mm². This compact format offers flexibility when locating the output switch. It supports short power-path routing between the supply output and connector while leaving room to organize nearby sensing circuits.
PCB design determines how effectively that compact package is used. Power copper should be planned around the datasheet's package dimensions, land pattern, and current direction, aligning electrical and thermal paths. The package outline area is not the total footprint and routing area; manufacturing and thermal requirements still need to be accommodated.
Challenge 4: Match Output Switching to the Controller's Drive Capability
Pain point: The power switch must combine low-resistance steady-state conduction with controlled transitions.
Switching the output requires charging and discharging the MOSFET gate. Gate charge, drive current, and the surrounding circuit influence turn-on and turn-off behavior. For a USB-C output switch, the objective is to match these transitions to application timing so that device operation follows the system's output-management requirements.
Solution: Use gate-charge specifications to evaluate drive requirements.
SK45N03BD has a typical total gate charge, Qg, of 26nC and typical Miller charge, Qgd, of 5.5nC, measured at VDD = 24V, ID = 15A, and VGS = 10V. The datasheet also identifies low gate charge, low reverse-transfer capacitance, and fast switching as product features, providing a basis for evaluating compatibility with the output-switch driver.
Engineers can combine these parameters with the controller's drive capability to estimate gate charging and discharging times, then inspect VGS and VDS waveforms to assess the transitions. Fast-switching capability provides flexibility in drive matching; the final switching speed should be selected with inrush current, ringing, and system timing in mind.
Challenge 5: A Defined Output Voltage Does Not Eliminate Transient Stress
Pain point: The output switch must operate through more than steady-state power delivery.
Startup, output transitions, load changes, and connector insertion or removal can change the transient voltage across the device. Selection therefore needs to account for the normal operating range as well as drain-source voltage stress during the off state and switching transitions.
Solution: Start with the 30V voltage rating and verify stress in the complete application.
SK45N03BD provides a 30V drain-source voltage rating and an absolute maximum gate-source voltage rating of ±20V. For a design that includes a 20V output operating point, these specifications establish defined limits for selection and voltage-stress assessment. Actual voltage spikes, derating requirements, and external protection must be evaluated alongside the device rating.
Device ratings establish a basis for selection; prototype validation shows how the device operates in the application. Four checks—conduction voltage drop, gate-source drive, drain-source stress, and thermal equilibrium—help connect SK45N03BD's specifications to actual system conditions.
Why Choose SK45N03BD for This Type of Design?
Selecting an output-switch MOSFET means answering four questions: Is the conduction loss suitable? Does the gate drive match? Does the voltage rating cover the expected stress? Does the package fit the layout? SK45N03BD addresses these requirements with a 30V drain-source voltage rating, 8.5mΩ typical on-resistance at 10V gate drive, a separate resistance specification at 4.5V gate drive, and a compact PDFN3.3×3.3 package.
In the SHIKUES 65W PD fast-charging solution, Q2 connects the controller's switching commands to the output power path. SK45N03BD supports steady-state loss optimization, switching assessment based on gate charge and drive conditions, and compact output-side layout. Its application value comes from the way these features match its specific circuit role.
SHIKUES SK45N03BD: Milliohm-level on-resistance and a compact PDFN package for an optimized 65W PD output path.
Contact the SHIKUES sales team for SK45N03BD product information, samples, and application support.
Choose the Output Switch for Your Next Compact Charger
Device specifications: SK45N03BD REV08.0. Application connections: SHIKUES 65W PD Fast-Charger Schematic. The interactive teardown is illustrative.
