8 large loss calculation and selection principles of switching power supply MOS!


Several basic principles of MOS design selection
Suggested basic steps for primary selection:

Voltage stress

In power circuit applications, the choice of drain-source voltage VDS is often considered first. The basic principle here is that the maximum peak drain-source voltage in the actual operating environment of the MOSFET is not greater than 90% of the nominal drain-source breakdown voltage in the device specification. That is: VDS_peak ≤ 90% * V (BR) DSS

Note: Generally, V (BR) DSS has a positive temperature coefficient. Therefore, the V (BR) DSS value at the lowest operating temperature of the equipment should be taken as a reference.


Drain current

Next consider the choice of drain current. The basic principle is that the maximum periodic drain current in the actual working environment of the MOSFET is not greater than 90% of the nominal maximum drain-source current in the specification; the peak value of the drain pulse current is not greater than 90% of the peak value of the nominal drain pulse current in the specification. : ID_max ≤ 90% * ID

ID_pulse ≤ 90% * IDP

Note: In general, ID_max and ID_pulse have negative temperature coefficients, so the ID_max and ID_pulse values ​​of the device under the maximum junction temperature conditions should be taken as references. The choice of this parameter of the device is extremely uncertain-mainly due to the mutual constraints of the working environment, heat dissipation technology, other parameters of the device (such as on-resistance, thermal resistance, etc.). The final judgment is based on the junction temperature (ie the “dissipated power constraint” in Article 6 below). According to experience, in practical applications, the ID in the bibliography will be several times larger than the actual maximum operating current, which is due to the constraints of power dissipation and temperature rise. During the primary calculation period, this parameter must be continuously adjusted according to the dissipation power constraint of Article 6 below. It is recommended that the initial selection is about 3 ~ 5 times ID = (3 ~ 5) * ID_max.


Driving requirements

The driving requirements of MOSFEF are determined by its total gate charge (Qg) parameter. In the case of meeting other parameter requirements, try to choose the smaller Qg to drive the circuit design. The driving voltage is selected to keep Ron as small as possible while keeping away from the maximum gate-source voltage (VGSS) (generally use the recommended value in the device specification).


Loss and heat dissipation

A small Ron value is helpful to reduce the loss during the on-time, and a small Rth value can reduce the temperature difference (under the same power dissipation condition), so it is good for heat dissipation.


Initial calculation of loss power

The MOSFET loss calculation mainly includes the following 8 parts:

PD = Pon + Poff + Poff_on + Pon_off + Pds + Pgs + Pd_f + Pd_recover

The detailed calculation formula should be determined according to the specific circuit and operating conditions. For example, in the application of synchronous rectification, the loss during the forward conduction of the diode in the body and the reverse recovery loss when the turn is turned off should also be considered. Loss calculation can refer to the “8 components of MOS tube loss” section below.


Dissipated power constraints

Device steady-state power loss PD, max should be based on the device’s maximum operating junction temperature limit. If the working environment temperature of the device can be known in advance, the maximum dissipated power can be estimated as follows:

PD, max ≤ (Tj, max-Tamb) / Rθj-a

Among them, Rθj-a is the total thermal resistance between the device node and its working environment, including Rθjuntion-case, Rθcase-sink, Rθsink-ambiance and so on. If there is insulation material in between, its thermal resistance must be taken into account.

8 components of MOS tube loss

In the process of device design selection, advance calculation of the working process loss of the MOSFET is required (the so-called advance calculation refers to the use of the parameters provided in the device specification and the calculated values ​​and expected waveforms of the working circuit without being able to test each operating waveform. Apply a formula for a theoretical approximation).

The operating loss of a MOSFET can be basically divided into the following parts:


Turn-on loss Pon

On-state loss refers to the loss caused by the voltage drop across the on-resistance RDS (on) of the load current (ie, drain-source current) after the MOSFET is fully turned on.

Calculation of conduction loss

First, get the IDS (on) (t) function expression through calculation and calculate its effective value IDS (on) rms, and then use the following formula to calculate the resistance loss:

Pon = IDS (on) rms2 × RDS (on) × K × Don


The period used to calculate IDS (on) rms is only the on-time Ton, not the entire duty cycle Ts; RDS (on) will vary with the IDS (on) (t) value and device junction temperature. The principle is to find the value of RDS (on) as close as possible to the expected operating conditions according to the specification (that is, multiply by a temperature coefficient K provided in the specification).


Cut-off loss Poff

Turn-off loss refers to the loss caused by the leakage current IDSS under the drain-source voltage VDS (off) stress after the MOSFET is completely turned off.

Cut-off loss calculation

First calculate the drain-source voltage VDS (off) that the MOSFET is off when it is turned off, and find the IDSS provided in the device specification, and then calculate it by the following formula:

Poff = VDS (off) × IDSS × (1-Don)


IDSS will change according to VDS (off), and the value provided in the specification is a parameter under an approximate V (BR) DSS condition. If the calculated drain-source voltage VDS (off) is very large or close to V (BR) DSS, this value can be directly quoted. If it is very small, it can be set to zero, which means it is ignored.


Opening process loss

The turn-on process loss refers to the loss caused by the overlapping overlap of the drain-source voltage VDS (off_on) (t) and the gradually rising load current (ie, drain-source current) IDS (off_on) (t) during the turn-on of the MOSFET.

Calculation of the opening loss

During the turn-on process, the cross waveforms of VDS (off_on) (t) and IDS (off_on) (t) are shown in the figure above. First, the VDS (off_end) before the opening time, the IDS (on_beginning) after the completion of the opening must be calculated or predicted, as shown in the figure, and the overlap time Tx between VDS (off_on) (t) and IDS (off_on) (t). Then calculated by the following formula:

Poff_on = fs × ∫ Tx VDS (off_on) (t) × ID (off_on) (t) × dt

There are two main assumptions in actual calculations — the assumption in Figure (A) that the beginning of VDS (off_on) (t) and the gradual rise in ID (off_on) (t) occur simultaneously; the assumption in Figure (B) that VDS The fall of (off_on) (t) starts after the ID (off_on) (t) rises to the maximum value. Figure (C) is the waveform actually tested by a MOSFET in the FLYBACK architecture, which is closer to the assumption of (A). Two calculation formulas have been extended for these two assumptions:

(A) Class assumption Poff_on = 1/6 × VDS (off_end) × Ip1 × trtr × fs

(B) Class assumption Poff_on = 1/2 × VDS (off_end) × Ip1 × (td (on) + tr) × fs

(B) Hypothesis can be used as the calculated value for the worst mode.


Figure (C) shows the actual test waveform. IDS (on_beginning) >> Ip1 (Ip1 parameter is often the initial value of the excitation current) when the power is on. It is difficult to predict the exact value of the superimposed current peak, which is related to the circuit architecture and device parameters. For example, the actual current in FLYBACK should be Itotal = Idp1 + Ia + Ib (Ia is the reverse recovery current of the secondary-side rectifier diode, which is the current value induced back to the primary pole-that is, multiplied by the turns ratio, and Ib is the layer between the primary windings of the transformer. Parasitic capacitance is the current released immediately after the MOSFET switch is turned on). This unpredictable value is also one of the main causes of calculation errors in this part.


Shutdown process loss

Shutdown process losses. Refers to the loss caused by the overlapping overlap of the drain-source voltage VDS (on_off) (t) and the decreasing drain-source current IDS (on_off) (t) during the turn-off of the MOSFET.

Calculation of loss during shutdown

As shown in the figure above, the calculation principle and method of this part of loss are similar to Poff_on. First, the drain-source voltage VDS (off_beginning) and the load current before the turn-off time must be calculated or predicted. IDS (on_end) is the Ip2 and VDS (on_off) (t) and IDS (on_off) (t ) Overlapping time Tx. Then calculate it with the following formula:

Poff_on = fs × ∫ Tx VDS (on_off) (t) × IDS (on_off) (t) × dt

In actual calculations, two calculation formulas are extended for these two assumptions:

(A) Assumption Poff_on = 1/6 × VDS (off_beginning) × Ip2 × tf × fs

(B) Assumption Poff_on = 1/2 × VDS (off_beginning) × Ip2 × (td (off) + tf) × fs

(B) Hypothesis can be used as the calculated value for the worst mode.


IDS (on_end) = Ip2. This parameter is often the end value of the exciting current in the power supply. Due to leakage inductance and other factors, the VDS (off_beginning) of the MOSFET after it is turned off often has a large voltage spike Vspike superimposed on it. This value can be roughly estimated by experience.


Driving loss Pgs

Driving loss refers to the loss caused by the gate receiving driving power to drive

Calculation of driving loss

After determining the driving power voltage Vgs, it can be calculated by the following formula:

Pgs = Vgs × Qg × fs


Qg is the total drive power, which can be found in the device specification.


Coss capacitor bleed loss Pds

Coss capacitor’s bleeder loss refers to the bleeder loss at the drain-source during the same period when the electric field stored in the MOS output capacitor Coss is off.

Calculation of bleed loss of Coss capacitor

The VDS before the opening time must be calculated or estimated first, and then calculated by the following formula:

Pds = 1/2 × VDS (off_end) 2 × Coss × fs


Coss is the output capacitance of the MOSFET, which can generally be equal to Cds. This value can be found from the device specifications.


Body parasitic diode forward conduction loss Pd_f

The forward conduction loss of the internal parasitic diode refers to the loss caused by the forward voltage drop when the MOS internal parasitic diode carries a forward current.

Calculation of forward conduction loss of internal parasitic diode

In some applications that use internal parasitic diodes to carry current (such as synchronous rectification), the loss of this part needs to be calculated. The formula is as follows:

Pd_f = IF × VDF × tx × fs

Among them: IF is the amount of current carried by the diode, VDF is the forward voltage drop of the diode, and tx is the time that the diode carries the current during a week.


It will vary depending on the device junction temperature and the amount of current it carries. You can find the value as close as possible in its specification according to the actual application environment.


Body parasitic diode reverse recovery loss Pd_recover

The internal parasitic diode reverse recovery loss refers to the loss caused by the reverse recovery caused by the reverse voltage after the MOS internal parasitic diode carries the forward current.

Calculation of Reverse Recovery Loss of Internal Parasitic Diode

This loss principle and calculation method are the same as the reverse recovery loss of ordinary diodes. The formula is as follows:

Pd_recover = VDR × Qrr × fs

Among them: VDR is the reverse voltage drop of the diode, and Qrr is the reverse recovery power of the diode.