Four steps for a novice to choose a MOSFET!
An engineer once told me that he never looked at the first page of the MOSFET data sheet, because the “practical” information only appeared after the second page. In fact, every page on the MOSFET data sheet contains valuable information for the designer. But people don’t always figure out how to interpret the data provided by manufacturers. This article summarizes some of the key indicators of MOSFETs, how these indicators are described on the data sheet, and clear pictures you need to understand these indicators. Like most electronic devices, MOSFETs are also affected by operating temperature. So it is important to understand the test conditions, and the mentioned indicators are applied under these conditions. It is also very important to understand whether these indicators you see in the “Product Introduction” are “maximum” or “typical” values, because some data tables do not make it clear.
The first characteristic that determines the MOSFET is its drain-source voltage VDS, or “drain-source breakdown voltage”, which is the highest voltage that the MOSFET can withstand without damage when the gate is shorted to the source and the drain current is 250 μA. . VDS is also called “absolute maximum voltage at 25 ° C”, but it must be remembered that this absolute voltage is related to temperature, and there is usually a “VDS temperature coefficient” in the data sheet. You also need to understand that the highest VDS is the DC voltage plus any voltage spikes and ripples that may be present in the circuit. For example, if you use a 30V device in a 30V power supply with a 100mV, 5ns spike, the voltage will exceed the device’s absolute maximum limit and the device may enter avalanche mode. In this case, the reliability of the MOSFET cannot be guaranteed.
At high temperatures, the temperature coefficient significantly changes the breakdown voltage. For example, the temperature coefficient of some 600V N-channel MOSFETs is positive. When approaching the maximum junction temperature, the temperature coefficient will make these MOSFETs look like 650V MOSFETs. The design rules of many MOSFET users require a derating factor of 10% to 20%. In some designs, considering that the actual breakdown voltage is 5% to 10% higher than the rated value at 25 ° C, it will increase the corresponding useful design margin in the actual design, which is very beneficial to the design.
It is also important to correctly select the MOSFET to understand the role of the gate-source voltage VGS during the conduction process. This voltage is a voltage that can ensure that the MOSFET is fully turned on under the given maximum RDS (on) condition. This is why the on-resistance is always related to the VGS level, and it is only at this voltage that the device can be turned on. An important design result is that you cannot use a voltage lower than the lowest VGS used to reach the RDS (on) rating to fully turn on the MOSFET. For example, to drive a MOSFET fully on with a 3.3V microcontroller, you need to use a MOSFET that can be turned on at VGS = 2.5V or lower.
On-resistance, gate charge, and “coefficient of figure”
The on-resistance of a MOSFET is always determined under one or more gate-source voltage conditions. The maximum RDS (on) limit can be 20% to 50% higher than the typical value. The RDS (on) maximum limit usually refers to the value at the junction temperature of 25 ° C. At higher temperatures, RDS (on) can increase by 30% to 150%, as shown in Figure 1. Since RDS (on) varies with temperature and the minimum resistance value cannot be guaranteed, detecting the current based on RDS (on) is not a very accurate method.
Figure 1 RDS (on) increases with temperature within the range of 30% to 150% of the maximum operating temperature
On-resistance is important for both N-channel and P-channel MOSFETs. In switching power supplies, Qg is a key selection criterion for N-channel MOSFETs used in switching power supplies because Qg affects switching losses. These losses have two aspects: one is the transition time that affects the MOSFET on and off; the other is the energy required to charge the gate capacitor during each switching process. One thing to keep in mind is that Qg depends on the gate-source voltage, that is, using lower Vgs can reduce switching losses.
As a way to quickly compare MOSFETs that are ready to be used in switching applications, designers often use a singular formula that includes the conduction loss RDS (on) and the switching loss Qg: RDS (on) x Qg. This “Factor of Merit” (FOM) summarizes the performance of the device and can compare MOSFETs with typical or maximum values. To ensure an accurate comparison in the device, you need to make sure that the same VGS is used for RDS (on) and Qg, and the typical and maximum values do not happen to be mixed together in the disclosure. A lower FOM allows you to get better performance in switching applications, but it cannot guarantee this. The best comparison results can only be obtained in actual circuits, and in some cases it may be necessary to fine-tune the circuit for each MOSFET.
Rated current and power dissipation
Based on different test conditions, most MOSFETs have one or more continuous drain currents in the data sheet. You need to take a closer look at the data sheet to find out whether this rating is at the specified case temperature (such as TC = 25 ° C) or the ambient temperature (such as TA = 25 ° C). Which of these values is most relevant will depend on the characteristics and application of the device (see Figure 2).
Figure 2 All absolute maximum current and power values are real data
For small surface mount devices used in handheld devices, the most relevant current level may be the current at an ambient temperature of 70 ° C. For large devices with heat sinks and forced air cooling, the current at TA = 25 ° C The rating may be closer to reality. For some devices, the current that the die can handle at its highest junction temperature is higher than the current level defined by the package. In some data sheets, this “die-defined” current level is a “package-defined” “Additional supplementary information on current levels allows you to understand the robustness of the die.
A similar situation should be considered for continuous power dissipation. Power dissipation depends not only on temperature but also on-time. Imagine a device working continuously for 10 seconds at PD = 4W under TA = 70 ℃. The factors that make up a “continuous” time period will vary depending on the MOSFET package, so you should use the standardized thermal transient impedance graph in the data sheet to see what the power dissipation looks like after 10 seconds, 100 seconds, or 10 minutes. As shown in Figure 3, the thermal resistance coefficient of this dedicated device after a 10-second pulse is about 0.33, which means that after about 10 minutes, the package reaches thermal saturation and the device’s heat dissipation capacity is only 1.33W instead of 4W. Under the condition of good cooling, the heat dissipation capacity of the device can reach about 2W.
Figure 3 Thermal resistance of a MOSFET under applied power pulses
In fact, we can divide the MOSFET selection into four steps.
Step 1: Choose N-channel or P-channel
The first step in choosing the right device for your design is to decide whether to use N-channel or P-channel MOSFETs. In a typical power application, when a MOSFET is grounded and the load is connected to the mains voltage, the MOSFET forms a low-side switch. In low-side switches, N-channel MOSFETs should be used because of the consideration of the voltage required to turn off or turn on the device. When the MOSFET is connected to the bus and the load is grounded, a high-side switch is used. P-channel MOSFETs are usually used in this topology, which is also for voltage drive considerations.
To choose the right device for your application, you must determine the voltage required to drive the device and the easiest way to implement it in your design. The next step is to determine the required voltage rating or the maximum voltage the device can withstand. The higher the rated voltage, the higher the cost of the device. According to practical experience, the rated voltage should be greater than the mains or bus voltage. This will provide adequate protection so that the MOSFET will not fail. When choosing a MOSFET, you must determine the maximum voltage that the drain to source can withstand, which is the maximum VDS. It is important to know that the maximum voltage that a MOSFET can withstand changes with temperature. The designer must test the voltage range over the entire operating temperature range. The rated voltage must have sufficient margin to cover this variation range to ensure that the circuit will not fail. Other safety factors that design engineers need to consider include voltage transients induced by switching electronics such as motors or transformers. Different applications have different rated voltages; typically, portable devices are 20V, FPGA power is 20-30V, and 85-220VAC applications are 450-600V.
Step 2: Determine the rated current
The second step is to choose the rated current of the MOSFET. Depending on the circuit structure, this rated current should be the maximum current that the load can withstand in all cases. Similar to the voltage case, the designer must ensure that the selected MOSFET can withstand this rated current, even when the system generates a peak current. Two current cases considered are continuous mode and pulse spikes. In the continuous conduction mode, the MOSFET is in a steady state, and the current continuously flows through the device. Pulse spikes refer to a large amount of surge (or spike current) flowing through the device. Once the maximum current is determined under these conditions, you only need to directly select the device that can withstand this maximum current.
After selecting the rated current, you must also calculate the conduction loss. In a practical situation, a MOSFET is not an ideal device because there will be power loss during the conduction process, which is called conduction loss. The MOSFET is like a variable resistor when “on”, which is determined by the RDS (ON) of the device and changes significantly with temperature. The power loss of the device can be calculated by Iload2 × RDS (ON). Because the on-resistance changes with temperature, the power loss will also change proportionally. The higher the voltage VGS applied to the MOSFET, the smaller the RDS (ON); otherwise the higher the RDS (ON). For system designers, this is where trade-offs depend on system voltage. For portable designs, lower voltages are easier (and more common), while for industrial designs, higher voltages can be used. Note that the RDS (ON) resistance will increase slightly with the current. Various electrical parameter changes about RDS (ON) resistors can be found in the technical data sheet provided by the manufacturer.
Technology has a significant impact on device characteristics, as some technologies tend to increase RDS (ON) when increasing the maximum VDS. For such technologies, if you intend to reduce VDS and RDS (ON), you must increase the chip size, thereby increasing the package size and development costs associated with it. There are several technologies in the industry that attempt to control the increase in wafer size, the most important of which are channel and charge balancing technologies.
In trench technology, a deep trench is embedded in the chip, which is usually reserved for low voltage and used to reduce the on-resistance RDS (ON). In order to reduce the impact of the maximum VDS on RDS (ON), an epitaxial growth pillar / etched pillar process is used in the development process. For example, Fairchild has developed a technology called SuperFET that adds additional manufacturing steps to reduce RDS (ON).
This focus on RDS (ON) is important because as the breakdown voltage of a standard MOSFET increases, RDS (ON) increases exponentially with it, and results in an increase in wafer size. The SuperFET process changes the exponential relationship between RDS (ON) and wafer size into a linear relationship. In this way, SuperFET devices can achieve the ideal low RDS (ON) at a small wafer size, even when the breakdown voltage reaches 600V. The result is a wafer size reduction of up to 35%. For end users, this means a significant reduction in package size.
Step 3: Determine Thermal Requirements
The next step in choosing a MOSFET is to calculate the thermal requirements of the system. The designer must consider two different cases, the worst case and the real case. A worst-case calculation is recommended because it provides greater safety margins and ensures that the system does not fail. There are also some measurement data on the MOSFET data sheet that need attention; such as the thermal resistance between the semiconductor junction of the packaged device and the environment, and the maximum junction temperature.
The junction temperature of the device is equal to the maximum ambient temperature plus the product of thermal resistance and power dissipation (junction temperature = maximum ambient temperature + [thermal resistance × power dissipation]). According to this equation, the maximum power dissipation of the system can be solved, which is equal to I2 × RDS (ON) by definition. Since the designer has determined the maximum current to be passed through the device, RDS (ON) can be calculated at different temperatures. It is worth noting that when dealing with simple thermal models, designers must also consider the thermal capacity of the semiconductor junction / device case and the case / environment; that is, the printed circuit board and package are not expected to heat up immediately.
Avalanche breakdown means that the reverse voltage on the semiconductor device exceeds the maximum value and a strong electric field is formed to increase the current in the device. This current will dissipate power, increase the temperature of the device, and may damage the device. Semiconductor companies perform avalanche tests on devices, calculate their avalanche voltage, or test the robustness of the device. There are two methods for calculating the rated avalanche voltage; one is the statistical method and the other is the thermal calculation. And thermal calculation is widely used because it is more practical. Many companies have provided details of their device testing. For example, Fairchild has provided the “Power MOSFET Avalanche Guidelines” (Power MOSFET Avalanche Guidelines-can be downloaded from the Fairchild website). In addition to calculations, technology also has a large impact on the avalanche effect. For example, an increase in wafer size will increase avalanche resistance and ultimately improve device robustness. For end users, this means adopting larger packages in the system.
Step 4: Determine Switch Performance
The final step in selecting a MOSFET is to determine the switching performance of the MOSFET. There are many parameters that affect switching performance, but the most important ones are gate / drain, gate / source, and drain / source capacitance. These capacitors cause switching losses in the device because they are charged each time they are switched. As a result, the switching speed of the MOSFET is reduced, and the device efficiency is also reduced. To calculate the total device loss during switching, the designer must calculate the loss during turn-on (Eon) and the loss during turn-off (Eoff). The total power of the MOSFET switch can be expressed by the following equation: Psw = (Eon + Eoff) × switching frequency. The gate charge (Qgd) has the greatest effect on switching performance.
Based on the importance of switching performance, new technologies are being continuously developed to solve this switching problem. An increase in chip size will increase gate charge; this will increase device size. In order to reduce switching losses, new technologies such as channel bottom oxidation have been developed to reduce gate charge. For example, a new technology called SuperFET